As it is known, in implementing memory circuits, particularly Flash EEPROM memories, a problem is raised in connection with the simultaneous existence within the circuit of logic signals as well as of signals variable within an extended voltage range and consequently with the need of simultaneous management of them. Such variable signals within an extended voltage range are intended to be used in the various operation modes of the memory, such as the read or programming or erasure operations. The logic signals, on the other hand, are control signals and are variable between ground voltage, as indicated by GND, and the supply voltage, as indicated by VDD. The normal supply voltage in these circuits, which are also designated as low voltage or low power circuits, is presently of about 3.3 volts, while the voltage used for performing operations such as internal programming or erasure operations can also reach 12 volts (for instance, 5 volts for read operations).
On the one side, this entails the need to implement various circuits on the chip to generate such higher voltages starting from the low supply voltage of 3.3 volts, and, on the other side, this entails the need to implement suitable circuits within the memory itself adapted to handle or manage these voltages higher than the supply voltage, without introducing time delays incompatible with a proper operation of the memory and consequently without affecting its access times. The essential requirement of these circuits, therefore, is related to their operation speed: these circuits are defined as voltage translators.